What is pipelining?

  • Pipelining is the process of carrying out multiple instructions concurrently
  • Each instruction will be at a different stage of the fetch-decode-execute cycle
  • One instruction can be fetched while the previous one is being decoded and the one before is being executed
  • In the case of a branch the pipeline cannot accurately predict the next instructions, so the pipeline is flushed
    • Pipeline Flushing clears all in-flight instructions from the pipeline
    • This is inefficient because it discards work already done, forcing the processor to restart the pipeline and slowing execution
  • This table shows which stage each instruction is at during each step:
 FetchDecodeExecute
Step 1Instruction A  
Step 2Instruction BInstruction A 
Step 3Instruction CInstruction BInstruction A
Step 4Instruction DInstruction CInstruction B
  • While one instruction is being executed, the next instruction will be decoded and the following instruction will be fetched

How does pipelining improve processor performance?

  • Pipelining reduces latency
  • The CPU is not idle while waiting for the next instruction which increases the speed of execution
  • The next instruction is fetched while the current one is decoded/executed
  • All parts of the processor can be used at any instance in time

Disadvantages of pipelining

  • Pipeline hazards occur when the next instruction in the line cannot execute due to certain issues. This massively reduces the efficiency of the pipeline by causing stalls
  • Pipeline hazards include Data Hazards (an instruction needs a result that has not yet been produced), Control Hazards (branches or jumps alter the programme flow, forcing the pipeline to be flushed), and Structural Hazards (when two instructions need the same resource (e.g., ALU or memory) at the same time)
  • Pipelining increases the design complexity of the CPU. More advanced control units are needed to handle pipeline hazards and ensure instructions are properly synchronised. This is especially true in CISC processors
  • Performance improvement is not always linear; for certain applications or short programs, the overhead of managing the pipeline may reduce the benefit
  • If an application has frequent branches or dependencies, the pipeline may be constantly stalling, reducing the advantage of pipelining